Associate Professor Braden Phillips
Position | Deputy Dean, Learning and Teaching |
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Org Unit | Faculty of Sciences, Engineering and Technology |
braden.phillips@adelaide.edu.au | |
Telephone | +61 8 8313 5114 |
Location |
Floor/Room
3
,
Ingkarni Wardli
,
North Terrace
|
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Biography/ Background
Associate Professor
Ph.D., B.E. (Hons), B.Sc., MIEEEResearcherID: A-8373-2008
Braden Phillips is an associate professor in the School of Electrical and Mechanical Engineering and Deputy Dean of Learning and Teaching for the Faculty of Sciences, Engineering and Technology at the University of Adelaide. He is a member of the Adelaide Education Academy and the Diversity and Inclusion in Teaching community of practice.
Braden’s discipline expertise is in the areas of digital microelectronics and computer engineering. He has published original research on computer arithmetic, new computing architectures for cognitive computing, and high level synthesis of digital logic.
In education practice and scholarship, Braden's focus is currently on on active learning in large classes, authentic and scalable assessment for learning, inclusive groupwork, and on curriculum that is backwards by design and just in time.
Prior to the completion of his PhD thesis, ’An Optimised Implementation of Public Key Cryptography for Smart Card Processors’, Braden worked as a process control engineer and was a founding partner in Current Dynamics, an electronic hardware design venture. He was a lecturer at Cardiff University in South Wales for 2 years before returning to the University of Adelaide in 2002.
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Awards & Achievements
2019 - University of Adelaide, Student-Led Teaching Award
2017 - University of Adelaide, Beacon Commendation for the Enhancement and Innovation of Student Learning
2016 - ECMS Faculty Prize for Excellence in Teaching
2010 - ECMS Faculty Prize for Excellence in Teaching (Teaching Team)
2009 - University of Adelaide, Excellence in Education Award (Teaching Team)
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Research Interests
- Computer Architecture Processor architectures for artificial intelligence and cognitive computing, data value speculation, application specific architectures
- High Level Logic Syntehsis Automatic deployment of high level code to diverse compluting platforms including CPU, GPU, and custom logic blocks
- Digital Arithmetic Hardware for integer and floating point operations, number systems, estimating arithmetic
- Information Security Implementing cryptography, circumventing side-channel attacks, semiconductor remanence
- Digital Microelectronics Low-power and high-performance circuits, subthreshold logic, fault tolerant circuits
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Entry last updated: Monday, 18 Dec 2023
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